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october 2011 doc id 022082 rev 1 1/21 AN3960 application note esd considerations for to uch sensing applications introduction electrostatic discharge (esd) is not a new phenomenon. it is often used to describe high voltage that may produce permanent damage. esd can be destructive and may leave a sytem in an unknown state from which recovery is impossible. fortunately, it can be prevented by several methods. some of these methods are cheap whilst some modify the behavior of the equipment. the ideal situation is to balance both of these factors to obtain a robust application which is not too expensive and which is unlikely to behave erratically. this document describes esd, its causes and risks. several models and standards relating to esd simulation are outlined. typical esd protection techniques are explained. test results are presented for the stm8t142-eval evaluation board which was tested against esd events using some of the protection methods detailed in this application note. www.st.com
contents AN3960 2/21 doc id 022082 rev 1 contents 1 what is esd ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 causes of esd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 risks of esd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 simulation and testing of el ectronic devices usi ng models . . . . . . . . . . . . 6 2.1.1 human body model (hbm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1.2 machine model (mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 standards overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2.1 js-001-2010 international standard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2.2 sp723 eiaj ic121 standard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2.3 iec61000-4-2 international standard . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2.4 mil-std-883h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2.5 esd standard summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2.6 test results of esd standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 protecting against esd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 dielectric overlays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 spark gaps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.3 ground rings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.4 adding resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.5 adding diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.6 esd protection devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.7 firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 stm8t142-eval evaluation board: esd tests . . . . . . . . . . . . . . . . . . . 16 4.1 test setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 test results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5 conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
AN3960 list of tables doc id 022082 rev 1 3/21 list of tables table 1. test conditions for esd standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 2. dielectric overlay materials and their dielectric strength. . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 3. esd protection devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 4. esd discharges for tested stm8t142-eval evaluation board . . . . . . . . . . . . . . . . . . . . . 18 table 5. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
list of figures AN3960 4/21 doc id 022082 rev 1 list of figures figure 1. electrostatic discharge test (esd generator and dut) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. iec61000-4-2 esd current waveform (r d = 330 w/c d = 150 pf). . . . . . . . . . . . . . . . . . . . 8 figure 3. pcb with spark gap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 4. ground ring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 5. test set up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 6. stm8t142-eval evaluati on board modifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
AN3960 what is esd ? doc id 022082 rev 1 5/21 1 what is esd ? esd is the sudden and momentary electric current that flows between two objects at different electrical potentials. esd immunity is a category of electromagnetic compatibility (emc) - the branch of electrical sciences which studies the unintentional generation, propagation and reception of electromagnetic energy with reference to its unwanted effects. emc describes the ability of a piece of equipment or a system to function satisfactorily in its electromagnetic environment without introducin g intolerable electromagnetic disturbances to anything in that environment. 1.1 causes of esd one of the causes of esd events is static elec tricity. static electric ity is often generated through the separation of electric charges when two materials are brought into contact and then separated, for example, rubbing a plastic comb against dry hair, removing some types of plastic packaging. in these cases, the friction between two materials creates a difference of electrical potential that can lead to an esd stress. another cause of esd damage is through elec trostatic induction. this occurs when an electrically charged object is placed near a conductive object isolated from ground. the presence of the charged object creates an electr ostatic field that caus es electrical charges on the surface of the other object to redistribute. even though the net electrostatic charge of the object has not changed, it now has regions of excess positive and negative charges. an esd stress may occur when the object comes into contact with a conductive path. for example, charged regions on the surfaces of styrofoam cups or plastic bags can induce potential on nearby esd sensitive components via electrostatic induction and an esd stress may occur if the component is touched with a metallic tool. 2 risks of esd esd is a serious issue in solid state electronics , such as integrated circuits (ics). ics are made from semiconductor mate rials such as silicon and insulating materials like silicon dioxide. either of these materials can suffer permanent damage when subjected to high voltages. the damaging effects of esd poses unacceptable risks in many areas of technology and it is necessary to control such interference and reduce the risks to acceptable levels through the: simulation and testing of electronic devices using models definition of standards
risks of esd AN3960 6/21 doc id 022082 rev 1 2.1 simulation and testing of electronic devices using models several models describe how to simulate an esd stress. the schematic circuit of figure 1 , shows how to generate an esd event to a device under test (dut). it is the basis of these models. figure 1. electrostatic discharge test (esd generator and dut) 1. legend: r 1 = resistor 1, r d = discharge resistor, c d = discharge capacitor, hv = high voltage, and v d = discharge voltage. r 1 , r d , and c d are defined according to a standard. 2. the charge and discharge switches are not closed simultaneously. 2.1.1 human body model (hbm) for testing the susceptibility of electronic de vices to esd stress from human contact, an esd simulator with a special output circuit called the human body model (hbm) is often used. this model simulates the discharge which migh t occur when a human touches an electronic device (either a system or a component). the hbm consists of a capacitor in series with a resistor (see figure 1 ). the capacitor is charged to a specified voltage from an external source, and then suddenly discharged through the resistor into an electronic terminal of the dut. 2.1.2 machine model (mm) this model simulates what happens when a machine becomes electrostatically charged and subsequently discharges into an electronic device when it comes in contact with it. the mm test circuit consists of charging up a 200 pf capacitor to a certain voltage and then discharging this capacitor directly into the dut. # $ 2 2 $ (6supply?6 $ #hargeswitch $ischargeswitch $54 ai ).054
AN3960 risks of esd doc id 022082 rev 1 7/21 2.2 standards overview standards exist for the following reasons: to reproduce well-defined tests in terms of their setup (bench size, type of isolating area) and conditions (such as temperature and pressure) to eliminate misunderstandings between manufacturers and purchasers to facilitate interchangeability and improvement of products to assist the purchaser in selecting and obtaining the appropriate product for his particular needs. none of these reasons are paramount. each depends on the needs of the customer who must also discuss with his purchaser. the subsections below provide an overview of the more important esd standards. 2.2.1 js-001-2010 international standard the esd association and jedec solid state technology association have established a joint standard procedure for testing, evaluating, and classifying components and microcircuits according to their susceptibilit y to damage or degradation by exposure to a defined hbm esd (1.5 k , 100 pf and 8 kv). 2.2.2 sp723 eiaj ic121 standard the sp723 eiaj ic121 mm sta ndard is for ensuring that the esd capability is typically greater than 2 kv (from 200 pf) with no serial resistor. for this standard, r d and c d of figure 1 are respectively 0 and 200 pf. 2.2.3 iec61000-4-2 in ternational standard the iec61000-4-2 standard for esd protection is 15 kv for air and 8 kv for contact. the typical waveform of the output current of the esd generator is described in figure 2 . for this standard, r d and c d of figure 1 are respectively 330 and 150 pf. this standard is more accurate for performing tests at system level rather than at electronic device level.
risks of esd AN3960 8/21 doc id 022082 rev 1 figure 2. iec61000-4-2 esd current waveform (r d = 330 /c d = 150 pf) 2.2.4 mil-std-883h this standard method classifies microcircuits according to their susce ptibility to damage or degradation by exposure to esd. for this standard r d is 1.5 and c d is 100 pf. it is well suited for electronic device tests as esd stress can be applied directly onto its pins. 2.2.5 esd standard summary an application has to align with one or more standards as agreed with the customer. ta b l e 1 summarizes the test conditions for the esd standards. when an esd event occurs, the standards outlined in section 2.2 describe four test results which can occur in a real application. 120 100 8 0 60 5 3 40 27 20 0 di s ch a rge c u rrent i e s d (%) -10 0 10 20 3 040 506070 8 0 90 100 time (n s ) ri s e time = 0.7 n s to 1 n s a i1 8 79 3 table 1. test conditions for esd standards standard model r d c d v d js-001-2010 hbm 1.5 k 100 pf 8 kv sp723 eiaj ic121 mm 0 200 pf 2 kv iec61000-4-2 (level 4) (1) 1. level 4 = maximum level of test voltage in the iec61000-4-2 standard. hbm and air discharge 330 150 pf 15 kv hbm, and direct discharge 330 150 pf 8 kv mil-std-883h (class 3b) (2) 2. class 3b = maximum level of test voltage in the mil-std-883h standard. hbm 1.5 k 100 pf 8 kv
AN3960 risks of esd doc id 022082 rev 1 9/21 2.2.6 test result s of esd standards the test results are as follows: normal performance continues wi thin the specification limits temporary degradation or loss of function or performance which is self-recoverable temporary degradation or loss of function or performance which requires operator intervention or system reset (the operator can be the end user) degradation or loss of function which is not recoverable due to damage of equipment (components) or software, or loss of data. the risks of failure are the same for touch sensing application as for other applications. when a touch occurs, the system or equipment can fail if it is not sufficiently robust.
protecting against esd AN3960 10/21 doc id 022082 rev 1 3 protecting against esd an effective approach for protecting any electronic system against esd is to mechanically minimize the pathways by which high voltages enter the system from the outside environment. this can be especially difficult if the user needs to touch the application or if there is a void or other opening in the packaging. mechanical switches and control potentiometers are classic system entry points for esd stress. changing from mechanical controls to capacitive touch controls eliminates the voids for these traditional esd entry paths. some methods which protect against esd stress include: dielectric overlays (see section 3.1 ) spark gaps (see section 3.2 ) ground rings (see section 3.3 ) adding resistance (see section 3.4 ) adding diodes (see section 3.5 ) esd protection devices (see section 3.6 ) firmware (see section 3.7 ) 3.1 dielectric overlays in the touch sensing application domain, a protective layer of "dielectric" material (any insulating material that can intrinsically withstand high voltages without breaking down) can be placed between the esd source and the touch sensing application. for example, one layer of 5 mil kapton? tape withstands 18 kv. other dielectric overlay materials are listed in ta bl e 2 together with their dielectric strengths.
AN3960 protecting against esd doc id 022082 rev 1 11/21 use of the dielectric overlay is effective and is almost mandatory for many applications however, there are some drawbacks, namely that the overlay does not surround the whole application and that an esd event can bypass the overlay. if the user can avoid accessing the application through the front panel (example, by accessing it from the back or elsewhere) or if the esd event can bypass the front panel, one of the other methods which protect the device against an esd event should be considered. 3.2 spark gaps physical techniques, such as the addition of spark gaps, can give supplementary protection to the input/output lines of a circuit board which are susceptible to extraneous voltage such as esd. for example, printed circuit board (pcb) spark gaps can be used to route esd to earth in products using capacitive sensing electrodes (see figure 3: pcb with spark gap ). a spark gap consists of an arrangement of tw o conducting electrodes separated by a gap usually filled with a gas such as air which is designed to allow an electric spark to pass between the conductors. when the voltage difference between the conductors exceeds the gap's breakdown voltage, a spark forms, ionizing the gas and drastically reducing its electrical resistance. the spark gap shown in figure 3 is an 8 mm gap which is a common pcb tolerance. the approximate breakdown of such a small spark gap is given in equation 1 . table 2. dielectric overlay materials and their dielectric strength material breakdown voltage (1) (v/mm) 1. the breakdown voltage of an insulating material is the minimum voltage that causes a portion of the insulator to become el ectrically conductive. min. overlay thickness at 12 kv (mm) air 1200?2800 10 dry wood 3900 3 common glass 7900 1.5 borosilicate glass, e.g. pyrex? 13000 0.9 polymethyl methacrylate (pmma) plastic, e.g. plexiglas? 13000 0.9 acrylonitrile butadiene styrene (abs) plastic 16000 0.8 polycarbonate, e.g. lexan? 16000 0.8 formica plastic 18000 0.7 fr-4 (2) 2. fr-4 is a widely accepted international grade deignati on for fiberglass reinforced epoxy laminates that are flame retardant. 28000 0.4 polyethylene terephthalate (pet) film, e.g. mylar? 280000 0.04 polymide film, e.g. kapton? 280000 0.04
protecting against esd AN3960 12/21 doc id 022082 rev 1 equation 1 where p is the pressure in atmospheres and d is the distance in millimetres. this spark gap can be expected to have a peak voltage of about 2000-2500 v. figure 3. pcb with spark gap 1. the contact area of this spark gap needs to be free of solder resist, in order to function as a spark gap. 3.3 ground rings to protect against esd stress on the touch sensing surface, a low impedance path to ground must exist through the device. the touch sensor can be protected using a ground ring (also called a guard ring) which is a ring around all the system electrodes (see figure 4: ground ring ). it is placed in the border area. the ground ring can be a simple metal foil. it is necessary to ensure that there is a firm connection between the ground ring and the device system ground. if the product is densely packed, it may not be possible to prevent an esd stress. consequently, the touch sensing device can be protected by controlling where the discharge occurs. this can be achieved through a combination of the: pcb layout mechanical layout of the system conductive tape or other shielding material these three items avoid an esd stress reachi ng the electrodes (and therefore the mcu) because they form a sufficient shield. for example, an esd stress goes directly to ground if it occurs in the ground ring. as recommended in ? pcb layout guidelines ?, providing a hatched ground plane around the touchkey or rotary or linear sensors (other types of electrode with different shapes) can redirect the esd stress away from the electrodes and touch sensing device. v 3000 p d () 1350 + = 3parkgaptoearth 4ouchsensingelectrode -36
AN3960 protecting against esd doc id 022082 rev 1 13/21 figure 4. ground ring 3.4 adding resistance the most common method of external esd protection is to add a small serial resistor in-line between the esd energy source and the touch sensing device pin to be protected. a resistor as small as 50 can double the esd immunity of a cmos device. a higher level of protection is somewhat proportional to increased serial resistance so, higher immunity is possible. this method works for two reasons. first, the serial resistor works with the parasitic pin capacitance (typically 5 to 10 pf) of the device to create a single-pole low pass filter with a cutoff frequency below 1 ghz. this causes the serial resistor to attenuate most of an esd event's high-frequency energy (as much as 90 % of the rising-edge power in an hbm discharge). second, when the protection circuits of the device are operating normally, their impedance is very low (in the order of tens of ohms or less). this low impedance works with the serial resistor to create a voltage divider, so that the high voltage from an esd stress can only bias the built-in protection circuits of the device with a portion of the total esd voltage. this attenuation is in addition to rising-edge filtering. the sum of these effects from a simple external serial resistor dramatica lly improves esd performance in a demanding application. %lectrode %lectrode 'uardringtotheground -36 4he%3$goesthroughthisway protectingtheelectrodeand thedevice
protecting against esd AN3960 14/21 doc id 022082 rev 1 3.5 adding diodes input/output lines that are susceptible to esd stress are sometimes protected by adding ?external? diodes which shunt the high energy of the esd stress before it can reach the device input pin. these diodes may either pass the current to the power supply rails or they may internally dissipate the unwanted power. external diodes are similar to the diodes built into a device (internal diodes) for protection but, they are designed differently. external diodes have two significant advantages: they can switch faster and at a lower excursion voltage than the internal diodes of the device. they can have much better connections to the supply rails and can carry more power. the effects of external diodes on circuit operation are different from internal diodes, because the connections used internally cannot be achieved with external devices. two types of protection diode are typically used against esd stress. zener diodes or transient voltage suppression (tvs) avalanche diodes can be placed between an input signal and ground. in this configuration, the diode protects the cmos input by reverse conduction whenever its voltage rises above the specified diode breakdown voltage. negative esd excursions are shunted to ground through normal diode action. in another configuration, diode pairs (typically schottky diodes due to their lower forward voltage drop) are placed between the input line and the power and ground rails. these devices protect the cmos input by normal diode conduction whenever the input line voltage moves outside the range of the power supply rails. diodes placed on capacitive sensed lines present the same problems to capacitive sensing circuits as they do with any analog circuit input: they can be highly capacitive (over 100 pf) and leaky. some schottky pairs leak over 20 a; some avalanche diodes leak over 1 ma when operated near their reverse-standoff voltage (generating significant noise voltage as well). although these given numbers are for the least suitable devices, the most commonly- used schottky and tvs diodes have parasitic parameters that make them unacceptable for use in capacitive sensing applications. if the di ode circuit can be designed to add only a very small amount of additional capacitance, capa citance sensing solutions can be adjusted to match. this is because compensation mechanisms are usually built into the touch sensing device for adaptation to the naturally-occurring changes in capacitance that result from environmental changes. however, leakage and bulk capacitance can create problems for any sort of capacitive sensing method, some more than others. external diodes with high reverse leakage make the test capacitance look larger because their leakage drains test current from the circuit. this disappearing test current (which should fill the capacitance under test) has no dv/dt effect on the test load. as diode leakage currents approach the level of the test current, the apparent load capacitance approaches infinity. also, the amount of current required to detect a 0.1 pf change in capacitance is less than 20 pa, many orders of magnitude less than the leakage current for some protection diodes. for this reason, where external diodes must be used, it is essential to specify devices with extremely low reverse leakage. the esdaulc6 diode from stmicroelectronics was designed to resist multiple esd stresses. it has low capacitance (1 pf) and low leakage (less than 100 na), both of which reduce the problems encountered when using schottky protection diodes. the bidirectional protection esdaxlc6 diode, with even lower capacitance (0.5 pf), can be used instead of the esdaulc6 diode to prevent the occurrence of negative and positive pulses. note: although small and inexpensive, an external diode circuit can be two to four times larger and four times more expensive than adding a serial resistor.
AN3960 protecting against esd doc id 022082 rev 1 15/21 3.6 esd protection devices a very effective method to protect input/outputs lines from esd discharges is to provide special purpose esd protection devices on the vulnerable traces. esd protection devices for touch sensing devices need to have a low capacitance. ta bl e 3 lists the esd protection devices which are recommended for use with touch sensing microcontrollers. 3.7 firmware when permanent damage occurs, the firmware is inefficient but, irreversible damage is not always the only consideration of an esd stress. the maximum risk due to an esd stress is degradation. however, in some less negative cases (such as temporary degradation or loss of function) when a simple system reset is needed, a self-recoverable application can be implemented by using the ?watchdog timer on?. the system can restart from a known state and resume normal operations. the final outcome is a robust application. the debounce firmware method is used to filter some unwanted signals and therefore helps reduce esd stress effects. table 3. esd protection devices esd protection device input capacitance (pf) leakage current contact discharge maximum limit (kv) air discharge maximum limit (kv) manufacturer part number littlefuse sp723 5 5 na (typ) 8 kv 15 kv nxp nup1301 0.6 (typ) 30 na 8 kv 15 kv stmicroelectronics hsp061-8m16 0.6 100 na 8 kv 15 kv vishay vbus05l1-dd1 0.3 < 0.1 a 15 kv 16 kv
stm8t142-eval evaluation board: esd tests AN3960 16/21 doc id 022082 rev 1 4 stm8t142-eval evaluation board: esd tests the stm8t142-eval evaluation board was tested against esd stress using some of the protection methods described in section 3: protecting against esd . 4.1 test setup two esd protection methods were tested: spark gaps and adding resistance (by testing a small serial resistor). during the test, the stm8t142-eval evaluation board was supplied by a small 12 v lead- acid battery through an l7805 regulator (see figure 5 ). figure 5. test set up the stm8t142-eval evaluation board was not originally designed to take esd stress into account: the onboard serial resistor (size 0603) is voltage undersized. the insulation distance between the electrode and the neighbouring pcb tracks is too small so that discharges can be seen directly on the device. -36 "attery %valuationboard 3ensor 2egulatoranditscapacitor
AN3960 stm8t142-eval evaluation board: esd tests doc id 022082 rev 1 17/21 the following design modifications were applied (see figure 6 ): a good voltage dimensioned serial resistor was used. sufficient isolation distances between the electrode and neighboring pcb tracks was implemented. a spark gap was built to route part of the esd energy away from the electrode to the application gnd. figure 6. stm8t142-eval evaluation board modifications
stm8t142-eval evaluation board: esd tests AN3960 18/21 doc id 022082 rev 1 4.2 test results table 4. esd discharges for tested stm8t142-eval evaluation board test condition esd stress through contact on the electrode (1) 1. the esd stress corresponds to the limit of normal system operation (detection of touch). esd stress through the air no protection 8 kv - with through hole resistor 12 kv - with through hole resistor and spark gap > 25 kv > 25 kv with glass panel (0.55 mm thickness) 12 ? kv \
AN3960 conclusion doc id 022082 rev 1 19/21 5 conclusion among the techniques to protect electronic systems against esd stress, the cheapest and simplest method is to add a sma ll serial resistor of about 50 . for greater robustness a diode or an esd protection device can be added.the drawbacks of these choices are price, leakage, and input capacitance. in an environment where esd can strike frequently, the most effective way is to use a combination of the techniques described in section 3: protecting against esd , for example, by simultaneously using a spark gap (with a 10 k serial resistor), a ground ring and robust firmware. in any touch sensing domain, most of the protection is provided by a dielectric overlay which is nearly always used. however, an esd stress can strike from anywhere so, other methods are recommended in parrallel with a dielectric overlay.
revision history AN3960 20/21 doc id 022082 rev 1 6 revision history table 5. document revision history date revision changes 03-oct-2011 1 initial release.
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